An Improved Successive-Cancellation Decoding Algorithm for Polar Code Based on FPGA

In 2009, Professor Erdal Arikan constructed the first Polar Code. In addition, he also proposed the decoding algorithm, which was successive-cancellation (SC) decoding algorithm. According to the polar coding theorem, the structure of Polar Code is actually a channel polarization selection problem, and the channel polarization choice which is actually according to the optimization of SC decoding performance. The 5G network coverage scene is more restrictive to download rate and time delay than before. Therefore, for channel coding, on the premise of ensuring connection reliability, the efficiency seems extremely important. In this paper, the SC decoding algorithm of Polar Code is improved and optimized to further improve the performance of Polar Code. At the same time, the performance of the Block Error Rate (BLER) and the Bit Error Rate (BER) is greatly improved. FPGA has the capability of high-speed data processing, parallel computation, and completely reconfigurable flexibility. Hence, the complexity of the SC decoding algorithm can be reduced based on the FPGA implementation. The simulation results show that the SC decoding algorithm based on FPGA proposed in this paper has low complexity, BLER and BER, and the experimental results match the theoretical analysis results.