Ultimate nano-electronics

New materials and device architectures will be needed to extend CMOS scaling.High mobility materials in the channel can boost the performance at scaled supply voltage.Ultimate reduction of power dissipation will require new concepts like Tunnel FET.Vertical devices and 3D stacking allow to further downscale the transistor dimensions. In this work, we will give an overview of the innovations in materials and new device concepts that will be needed to continue Moore's law to the sub-10nm technology nodes. To meet the power and performance requirements high mobility materials in combination with new device concepts like tunnel FETs and gate-all-around devices will need to be introduced. As the density is further increased and it becomes increasingly difficult to put contacts, spacers and gate in the available gate pitch, disruptive integration schemes such as vertical transistors and monolithic 3D integration might lead the way to the ultimate scaling of CMOS.