Evaluation of radiation hardness design techniques to improve radiation tolerance for CMOS image sensors dedicated to space applications

CMOS image sensors are nowadays extensively considered for several space applications. Mission requirements may vary considerably in term of radiation tolerances. This paper will demonstrate that several design options are available to minimize degradations due to ionizing radiation and fulfill requirements of the most of space applications. The first part of this paper gives an overview of ionizing radiation degradations in CMOS image sensors. Design techniques and options allowing to improve CMOS image sensors behavior in term of dark current, quantum efficiency, conversion gain and power consumption are depicted. A test vehicle designed by SUPAERO-CIMI team in cooperation with EADS-Astrium using a 0.35µm technology improved for image sensor is described. A description of the key features of the technology used will be given. This test vehicle is composed of various sub-arrays with different pixel types, different organizations and different design techniques. Three readout circuits are also implemented with different level of hardening to avoid ionizing radiation degradations. Five circuits have been exposed to different level of ionizing radiation (4 Krad to 100 Krad) and have been characterized after radiation and after annealing. Results in term of dark current, quantum efficiency and conversion gain are given in the second part. Effects of radiation will be considered for both the technology (intrinsic radiation behavior) and the design level allowing to quantify the impact of pixel type and organization (standard and radhard design). In conclusion, a summary of key benefits of the various approaches will be presented.