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Atm/stm interface circuit

1992 
PURPOSE:To miniaturize the circuit and to reduce the power consumption in the interface circuit between ATM cell signal and STM frame. CONSTITUTION:The inputted cells are stored in a FIFO circuit 12 under the control of a write control circuit 13 and a read control circuit 15. In this case, the phase difference can be absorbed by inserting and deleting idle cells. The reading of the stored cells is performed according to the timing signal generated by a frame generation circuit 16. The timing signal is supplied to each block, and the operation of each block is performed by the same clock.
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