Parasitic Capacitance Modeling of Inductors Without Using the Floating Voltage Potential of Core

The analytical modeling of parasitic capacitances in inductors is commonly based on the energy-conservation law. Yet, in order to calculated the equivalent capacitances of inductors, the floating voltage potential of magnetic core is required to be pre-known in all previous modeling methods. This letter proposes an analytical method for calculating the parasitic capacitances of the inductors with low-resistivity cores, which does not require any prior knowledge of the floating core potential. The proposed modeling method can be extended to the transformers as well as multi-terminal magnetic devices. The experimental results verify the effectiveness of the proposed method.