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A shallow trench isolation for sub-0.13 m CMOS technologies
A shallow trench isolation for sub-0.13 m CMOS technologies
1997
Mahalingam Nandakumar
Swaroop Sridhar
Sudip K. Nag
Paulo Roberto Mei
David Rogers
Maureen A. Hanratty
Ajith Amerasekera
Ih-Chin Chen
Keywords:
Shallow trench isolation
Electronic engineering
Geology
CMOS
Correction
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