Design of Energy Efficient Logic Using Adiabatic Technique

With the adiabatic switching approach, the circuit energies are conserved rather than dissipated as heat. Depending on the application and the system requirements, this approach can be used to reduce the power dissipation of the digital systems.  This work focuses on the design of a new full adder circuit, using adiabatic logic designs such as ECRL and PFAL are implemented in Micro-wind & DSCH. The efficiency of the circuits is explored and compared for different adiabatic logics. With the help of adiabatic logic, the energy savings of upto 76% to 90%   can be reached. Circuit simulations show that the adiabatic design units can save energy by a factor of 10 at 50MHz and about 2 at 250MHz, as compared to the logically equivalent conventional CMOS implementation.