METROLOGY REQUIREMENTS FOR MANUFACTURING 3D INTEGRATED CIRCUITS

Three-dimensional integrated circuits (3D ICs) introduce wafer bonding and Through Silicon Vias (TSVs) as new modules, thus extending manufacturing requirements beyond CMOS. A 3D IC with a photosensor is taken as an example to further analyze the resulting new metrology requirements for mass production. For the wafer bond module, data on defects before and after bonding, bond interface adhesion strength, and the module, thickness control for deposited layers and defect metrology including the trench sidewall and bottom are identified as key requirements. Mass production requires non-destructive inline metrology in all cases. This has been achieved for electrical parameters, bond void (Scanning Acoustic Microscopy), and TSV depth monitoring (optical methods). Other parameters such as bond strength, as well as layer thickness or defect metrology inside TSVs, demand further R&D.