Single-particle resistant transient pulse CMOS circuit

The invention provides a single-particle resistant transient pulse CMOS circuit which comprises a first buffer (101), a second buffer (102), four MOS tubes and an output inverter. The input end of the first buffer (101) is connected with input signals to output first buffer signals (out1) to be used for eliminating low-high-low type pulses, the input end of the second buffer (102) is connected with the input signals to output second buffer signals (out2) to be used for eliminating high-low-high type pulses, when the electric level of the first buffer signals (out1) and the electric level of the second buffer signals (out2) are equal, the electric level which is equal to the electric level of the first buffer signals (out1) and the electric level of the second buffer signals (out2) is output (out put) through the output inverter, otherwise the electric level is kept unchanged, and accordingly the single-particle resistant transient pulse is achieved. Required MOSs in the single-particle transient pulse resistant CMOS circuit are fewer, and the single-particle resistant transient pulse CMOS circuit is small in size and good in filtering effect.