Analytical Study on a 700 V Triple RESURF LDMOS With a Variable High-K Dielectric Trench

A novel 700 V triple REduced SURface Field (RESURF) lateral double-diffused MOSFETs (LDMOS) with a variable high- ${K}$ (VHK) dielectric trench for smart power applications is proposed and studied by TCAD simulations. Compared with conventional triple RESURF (CTR) LDMOS, the new structure features a composite high- ${K}$ (HK) dielectric trench embedded in the drain edge. First, a higher HK dielectric layer is in the upper trench to suppress the high electric field ( ${E}$ -field) under the drain by dielectric RESURF. Second, a lower HK dielectric is at the bottom of the trench to promote the depletion of the ${N}$ -buffer layer and ${P}$ -substrate, which increases the ${N}$ -buffer doping concentration and thus reduces ON-resistance. The overall vertical bulk ${E}$ -field distribution is modulated by the ${E}$ -field peak generated at the position of varying ${K}$ dielectric, which greatly improves breakdown voltage (BV). An analytical model of BV and vertical ${E}$ -field taking account of the influence of the VHK dielectric trench is presented. Simulation results show that the proposed VHK TR LDMOS is able to obtain a 30.2% higher BV and a lower 15.4% ${R}_{ \mathrm{\scriptscriptstyle ON}, \text {sp}}$ than the CTR LDMOS. Moreover, the figure of merit (BV2/ ${R}_{ \mathrm{\scriptscriptstyle ON}, \text {sp}}$ ) of VHK TR LDMOS has doubled further breaking the lateral silicon limit.