Modeling and simulation for conducted common-mode current in switching circuits

There is a lack of comprehensible model for common mode current modeling for switching power circuits. It is established that common mode current is strongly dependent on stray capacitance of each circuit node, especially those with high dv/dt and di/dt. A model is established in this paper. Computer software based on partial element equivalent circuit (PEEC) method is used, where the parasitic elements of the printed circuit board (PCB) are calculated. Simulation results agree well with experimental results up to 10 MHz.