Integration of a 0.13-/spl mu/m CMOS and a high performance self-aligned SiGe HBT featuring low base resistance

2002 
Without inducing any degradation of CMOS performance and reliability, a high performance self-aligned SiGe-HBT process was successfully integrated to a standard 0.13-/spl mu/m CMOS platform including dual gate oxides and five layers of Al metallization. Suppressing moisture elimination from a wafer surface is a key for reducing thermal budgets during the SiGe HBT formation process. We found that a heavily boron-doped intrinsic base that is highly activated by 1000/spl deg/C RTA improved HBT performance with low r/sub bb/ of 82 /spl Omega/ and high f/sub T//f/sub max/ of 122/178 GHz.
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