Design of a row decoder for RFID transponder EEPROM

A row decoder circuit is required for the successful programming, reading, and erasing voltages of an electrically erasable programmable read only memory (EEPROM) implementation in low-power applications like radio frequency identification (RFID) tag. The row decoder has been implemented in 0.18 μm CMOS process. The designed row decoder can generate sixteen output signals, which is used in sense amplifier (SA) circuit for read operation. The row decoder required lower power dissipation with 1.39 nW under power supply voltage (VDD) 1.8 V. Moreover, this designed row decoder produced faster access time maximum 0.3 μS for all the sixteen bit signals. Moreover, a faster settling time 0.96 μS is also achieved from all the inputs and outputs under supply voltage 1.8 V.