- Circuits and Architectures for Low-Power FPGAs

The programmability of field-programmable gate arrays (FPGAs) allows them to implement any digital circuit, bringing a myriad of benefits to the user. FPGAs offer shorter time to market, lower per-unit cost (versus ASICs) in moderate volumes, and reconfigurability-easing testing and debug, and enabling the use of FPGAs in custom-computing applications. Unfortunately, programmability does not come for “free.” It it is associated with overhead such that an FPGA implementation of a given circuit consumes more power, area, and is slower than a custom ASIC implementation. Our focus in this chapter is FPGA power, which has been shown to be 7-14× higher than an equivalent ASIC implementation [1]. The high power consumption of FPGAs has, with a few recent exceptions, largely excluded them from use in one of the most exciting technology trends affecting society in recent years-the mobile computing revolution.