Warpage Reduction Technology for Image Sensor Chips

We have developed a technique to reduce the chip warpage that results when a large sensor chip is bonded to a board. We performed a structure simulation that included the use of die-bond resins. We improved the die-bonding process, produced a prototype, and tested it. Results showed that it is possible to keep the warpage below 20μm even when a chip over 20 mm long is bonded to a printed circuit board with thermoset die-bond resins. We used our warp control technique to bend a sensor chip in the direction of the field curvature of a photographic lens. With the aim of deploying large sensors in the future, we performed a basic verification test of the tiling technique used to align multiple chips in a plane, developed a chip connection technique, and identified potential problems that could hamper the practical use of both.