Damascene interconnect having improved mechanical properties porous low k layer

To provide a technique relating to single and dual damascene interconnect toward the integrated circuit. A method of fabricating a damascene interconnect. The method comprises providing the forming of a porous dielectric layer on a substrate, and the porogen material in the upper portion of the porous dielectric layer to define a low-porous dielectric sublayer in the dielectric layer It is initiated by. Capping layer is formed to a small porous dielectric sublayer on, a resist pattern is formed on the cap layer to define a first interconnect opening. Capping layer and the dielectric layer is etched through the resist pattern to form a first interconnect opening. Resist pattern is removed, interconnection is formed by filling the first interconnect opening with a conductive material. To remove excess conductive material, interconnects are flattened. .BACKGROUND 9