Design of LVDS driver based CMOS transmitter for a high speed serial link
2010
This paper presents a low-power CMOS multichannel transmitter that achieves a data rate of 3.125Gb/s/ch. The LVDS (Low-voltage differential-signaling) driver is used because of its noise immunity and low power consumption. And a pre-emphasis circuit is also proposed to increase the transmitter speed. The prototype chip is comprised of 4 channels and was fabricated in a 0.18 μm standard CMOS process. The measured output jitter of transmitter is 100ps, peak-to-peak(0.31UI). The area of the chip is 0.045 mm 2 and the power consumption is about 48mW/ch.
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