A language aid for IC design

Abstract When designing integrated circuits, especially VLSI circuits, very comprehensive circuits in various forms of representation are formally to be described as well as are to be managed data-technically and mathematically. Because of the iterations required with the design process that extend over several different description levels (for example, graphs, Boolean equations and differential equations), a general net description is unconditionally required for the continuity of the computer-supported design. Such a net description serves for a systematic topological orientation down to the respective circuit detail to be processed and, thus, for increasing the effectivity of the design itself and of the error searching with the related changes. Also, it serves for reducing and unifying the many older special problem languages of the design process. Furthermore, it offers the basis for a standardized and thus automized translation of circuit design into another description form (for example, first design of the electrical network on the basis of the logical network). The common and uniform language for all design levels that is represented here requires only a single acquisition of the circuit structure and forms the basis for a uniform library system and for a standardizable, machine supportable documentation.