Temperature dependence of the iron donor level in silicon at device processing temperatures

Iron depth profiles in a p-type silicon epitaxial layer on a p+-type silicon substrate have been examined by deep-level transient spectroscopy and computer simulations. By comparing the experimental results with the simulations, we revealed the position of the iron deep donor level to be 0.42±0.04 eV from the valence-band edge at 412–580 °C, which is in a device processing temperature range. The iron donor level was nearly temperature independent within error. Knowing the temperature dependence of the iron donor level at the device processing temperatures, we can design iron gettering in silicon more precisely.