Implementation of FFT and CRBLASTER on the Maestro processor

Currently, most microprocessors use multiple cores to increase performance while limiting power usage. Some processors use not just a few cores, but tens of cores or even 100 cores. One such many-core microprocessor is the Maestro processor, which is based on Tilera's TILE64 processor. The Maestro chip is a 49-core, general-purpose, radiation-hardened processor designed for space applications. The Maestro processor, unlike the TILE64, has a floating-point coprocessor in each core for improved floating point performance. The Maestro processor runs at up to 350 MHz clock frequency. On the Maestro processor, we implemented an FFT and an image processing application called CRBLASTER and evaluated the performance. The FFT is a well-known and commonly used signal processing kernel. CRBLASTER is a parallel-processing image-analysis application that does cosmic-ray rejection on CCD (charge-coupled device) images using the embarrassingly-parallel L. A. COSMIC algorithm. Both applications were written in C. CRBLASTER uses the high-performance computing industry standard Message Passing Interface (MPI) library. The achieved performance of the FFT was up to 3,813 MFLOPS, and the speedup compared to single tile was 46.4 using 49 tiles. The speedup for CRBLASTER, which was memory-bound, was up to 12.5 using 36 tiles.