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3D回路設計レイアウトを用いた縦型FET素子の挑戦と機会【Powered by NICT】
3D回路設計レイアウトを用いた縦型FET素子の挑戦と機会【Powered by NICT】
2016
A. Veloso
Trong Huynh Bao
Erik Rosseel
Vasile Paraschiv
K. Devriendt
E. Vecchio
C. Delvaux
Boon Teik Chan
Monique Ercken
Zheng Tao
W. Li
Efrain Altamirano-Sanchez
J. Versluijs
S. Brus
Philippe Matagne
Niamh Waldron
Julien Ryckaert
D. Mocuta
N. Collaert
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