On thermal stresses and reliability of a PBGA chip scale package

Thermomechanical analysis using the nonlinear finite element method was performed to study the thermal stresses and reliability problems of a flip chip plastic ball grid array (PBGA) chip scale package (CSP). The package under investigation has the fully populated PBGA solder joints in an array pitch of 1.27 mm. A cyclic temperature load of 0-100/spl deg/C at a frequency of 2 cycles per hour was applied to the modeled package. The dependence of solder joint reliability on the CSP configuration and the use of mold compound was demonstrated for various chip sizes varying from 5 mm to 20 mm. The analysis results show that the chip-outline solder joint may fail earlier than any other solder joint in the modeled package. This confirms both experimental and modeling observations in the literature that the interior PBGA solder joint failure is mainly caused by the thermally induced warpage of organic-based package. It is contrary to the classical DNP theory used in predicting the fatigue failure location and mechanism of solder joints in the ceramic-based packages. The overmold flip chip PBGA chip scale package has a mean thermal fatigue life of the first failed solder joint that is approximately 1.2/spl times/ that of the standard flip chip PBGA scale package without overmold.