Transistor with a reduced charge-carrier mobility and associated method and SRAM cell with such transistors

Means (400, 500), comprising: a first transistor (420; 510, 520) with a web and a second transistor (330) having a web, wherein the web of the first transistor (420; 510, 520) has a lower carrier mobility than the web of the second transistor (330), is doped, and a channel in the web of the second transistor (330) undated or doped with a concentration which is substantially less than a concentration of a dopant of the first transistor, wherein a channel in the web of the first transistor (510, 520 420) (420; 510, 520), and wherein the channel of the first transistor (420; 510, 520) is doped with a first dopant of a first polarity and a second dopant of the first polarity opposite the second polarity having a ratio of about 1: is counter-doped. 1