An All Low-Voltage Devices Level Shifter with Stress Protection for Powering Events

Modern system-on-chip (SoC) applications commonly comprise multiple voltage domains to save power consumption according to the required circuit performance. Level shifter (LS) blocks usually interface these power domains to guarantee fitting voltage levels for the control signals among low supply and high supply voltage domains. Using only thin-oxide transistors for LS implementations enables their subsequent integration into the digital domain of an SoC and enhances circuit speed performance. Nevertheless, thin devices entail overvoltage issues when the voltage difference between the supply domains to be communicated is large, e.g. during the SoC's power-up sequence. Here we propose an LS architecture along with a three-devices protection scheme to avoid powering-up overvoltage issues, which have been neglected by reported LS works, validated through simulations. The results disclose a maximum operating frequency of 400MHz and an average energy-per-transition of 470fJ.