Impact of Channel Engineering on 16nm, 18nm & 20nm Doping-less DG MOSFET

Double Gate MOSFET is a promising candidate for future low power applications with low leakage current and increased gate control over the channel electric field. Double gate MOSFET (DG-MOSFET) are designed as symmetric and asymmetric architectures with different gate overlap or underlap regions to achieve better subthreshold performance. The channel analysis on double-gate MOSFET shows that low channel doping with equal dopant atoms as in source and drain is a suitable choice to keep leakage current smaller and a suitable threshold voltage change. Subthreshold performance parameters are considerably improved with the concept of low doping junction-less double-gate MOSFET. High-K dielectric material (HfO 2 ) with high work function gate contact material as platinum is also a suitable choice to achieve low leakage current. Channel doping is helpful within the context of leakage power reduction, thus in optimizing the device parameter the channel doping can contribute the necessary role. The proposed DG-MOSFET is designed and analyzed on a Visual TCAD 2D and 3D device simulator.