Silicon wafers for industrial n-type SHJ solar cells: Bulk quality requirements, large-scale availability and guidelines for future developments

Abstract In this work, we derive and discuss the wafer bulk requirements for industrial amorphous/crystalline n-type silicon heterojunction cells. In particular, we investigate in detail the efficiency variations as a function of a) bulk carrier lifetime, b) dark resistivity, as well as c) the ratio of both quantities. To this end, we resort to finite element simulations to calculate how the I(V) parameters vary with the bulk properties listed above. In order to validate the simulation outputs, SHJ cells were processed from several wafer groups specially prepared to span wide ranges of bulk lifetimes and resistivities. Once validated, the simulation results are used to compute the wafer requirements as a function of the targeted efficiency, and the specifications derived therefrom are compared with literature. In this respect, the limits of the bulk lifetime/resistivity ratio, often employed to discuss wafer specifications, are highlighted. Combining the established requirements with statistical data from mass production of Czochralski ingots, we then assess whether or not nowadays commercially available monocrystalline wafers allow for a stable production of high efficiency devices. From a wafer manufacturer's standpoint, we quantify for a fixed cell structure, the room for efficiency improvement expected with further progresses in wafer bulk properties. Last, we also provide an outlook on how wafer requirements shall evolve with cell efficiency up to 25%.