The effects of probe spot size and sampling grid density on process control values derived from photoluminescence mapping

Abstract Whole wafer processing of III–V compound semiconductor materials has created a need for spatially resolved characterization tools. Photoluminescence mapping has been widely adopted for this purpose. In order to make an accurate assessment of an epitaxial layer using this technique, careful attention must be paid to the probe spot size and to the sampling statistics. In this paper we discuss both spot size and grid spacing and demonstrate the effects of undersampling an inhomogeneous epitaxial layer. Guidelines for the routine photoluminescence mapping of III–V epilayers are established.