The Electrical Phenomena of Non-planar Structure and Devices using Plasma Doping

We fabricated narrow fins structures and non-planar MOSFETs like FinFETs and triple-gate MOSFETs using plasma doping with substrate heating under 350··, and measured their I-V characteristics. Fins and MOSFETs using low-temperature doping process show good current drivability and low subthreshold slope. However, without post high-temperature thermal annealing, this process could not avoid generating defects and traps as well as mobile protons on the gate and gate oxide interface and junctions, and therefore degraded device reliability. The results of ultra-small MOSFET research show possibility of new memory devices with these traps and ions in devices.