A method for extracting a semiconductor device gate dielectric layer traps time constant

2013 
The present invention discloses a method of extracting a trap gate dielectric layer a semiconductor device the time constant, the field of microelectronic device belonging reliability. The method begins by initializing the state of the semiconductor device in the trap, the trap so that the final state to the empty state; and a DC signal or an AC signal is applied to the gate terminal, drain terminal Vd1 zero bias, after a period after time t1, the gate terminal, the drain terminal and applying a small voltage Vg2 respectively Vd2, the drain current Id detected state; t1 to time t2 = t1 + Δt, the other conditions unchanged, repeat the previous step, and so on, the measured N times t1, t1 + Δt ... ... t1 + (N-1) Δt, N time points corresponding to the drain terminal of the current state; followed by a moving average, is calculated (Nn) time points corresponding to the occupation probability P; using equation obtained by fitting the trap trapping time constant emission time constant.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    0
    References
    0
    Citations
    NaN
    KQI
    []