The characterization of the built-in bipolar junction transistor in H-gate PD-SOI NMOS

Abstract The built-in bipolar junction transistor of H-gate partially depleted SOI NMOS was characterized by measuring the common-emitter output curve and calculating the common-emitter current gain. Unoptimized doping results in a low common-emitter current gain. The bias state of the front gate of the MOS has a significant influence on the characteristics of the built-in BJT. The geometry effect of the device is also studied. It is proved by mathematical analysis that the emitter current crowding effect also exists on the built-in BJT.