Stress analysis and characterization of PECVD oxide/nitride multi-layered films after thermal cycling

Chemically deposited multiple layer films are common structures in microelectronics and MEMS devices and their stress states directly influence both their structural and electrical integrities. From structural reliability perspective, it is important to assess stress state for guiding the structural integrity evaluation. However, the stress states of the film structures during deposition and after post-deposition thermal annealing are process-dependent due to the interaction between thermal stress, void-driven intrinsic stress generation, and stress relaxations. Under such a complex circumstance and multiple length scale nature, it needs an effective model to guide the structural design. In this work, a semi-analytical phenomenological-based model is proposed by simultaneously considering microstructure evolution-dependent intrinsic stress, stress relaxation, and multi-layered curvature-stress relation to predict the stresses existed in each structural layer during thermal processing. The model is then implemented in a finite element model to mimic the entire processing. The model prediction and the experimental results are then mutually correlated and the prediction results agrees with that performed by finite element simulation well. Finally, essential material characterization results in associated with the model prediction are then applied for evaluating residual stresses of each layer in multi-layer nitride/oxide structures as the basis for observed structure failures under indentation loads. In summary, this work provides a rational analysis procedure for stress analysis of multi-layered deposited films during deposition and/or after subsequent thermal processing with experimental verifications and essential demonstrations. This approach should be possible to provide more precise information for optimizing the deposition and the subsequent thermal annealing processes for improving structural longevity of IC devices.