Impact of annealing temperature on band-alignment of PLD grown Ga2O3/Si (100) heterointerface

Abstract Cost-effective integration with existing silicon CMOS electronics has been one of the primary motivations for most of the emerging non-silicon devices. In this context, β-gallium oxide (Ga2O3) films were deposited on Si (100) substrate using pulsed laser deposition (PLD) technique in this research. After deposition, samples were further annealed at 600 °C and 800 °C under vacuum. X-ray diffractometer (XRD) was employed to observe the crystallinity variation due to the annealing. The crystallinity of samples degrades with annealing at 600 °C and an incremental improvement in crystallinity was again exhibited at 800 °C due to the possible rearrangement of the Ga and O atoms to their optimal sites. Further, x-ray photoelectron spectroscopy (XPS) was used for identification of elements and chemical composition. XPS results were also analyzed to locate the position of Ga 2p and Si 2p core levels and calculate the valance band offset (VBO) at Ga2O3/Si interface. Reflected electron energy loss spectroscopy (REELS) and ultraviolet photoelectron spectroscopy (UPS) were utilized to calculate the bandgap and work function, respectively. Moreover, valance band maxima and Fermi level position of the as-deposited and annealed samples were calculated using UPS. The bandgaps for the as-deposited, annealed samples at 600 °C and 800 °C were estimated to be 4.72 ± 0.05, 4.52 ± 0.05, and 4.48 ± 0.05 eV, respectively. Consequently, the work function of the sample increases with annealing due to increase in the oxygen vacancies and resulting bandgap narrowing. The band offsets (valance band, conduction band) were determined to be (3.35 ± 0.05 eV, 0.26 ± 0.02 eV), (3.55 ± 0.05 eV, 0.15 ± 0.02 eV) and (3.54 ± 0.05 eV, 0.17 ± 0.02 eV) for the as-deposited, annealed samples at 600 °C and 800 °C, respectively. This optimization of band alignment with annealing temperature shall be very useful for controlling the carrier transport at the interface for Ga2O3/Si based devices. Thus, a trade-off is to be performed between VBO and crystallinity of the Ga2O3/Si to operate the devices efficiently and reliably respectively.