A 0.166 pJ/b/pF, 3.5–5 Gb/s TSV I/O Interface with VOH Drift Control

A voltage-mode transmitter (TX) with a predriver and a receiver (RX) with an energy-efficient level shifter (LS) is proposed to reduce power consumption in the heavy load of a through-silicon via (TSV) input–output (I/O) interface. An N-over-N (NN) driver with the proposed predriver reduces $\text{V}_{OH}$ drift to enhance jitter characteristics. In addition, the swing level of the transmitted signal can be lowered to 600 mV with a single supply voltage at the TX. To recover the swing level, the RX is designed with the proposed LS that can operate with a data rate of 5 Gb/s. An 8-stacked TSV is emulated in the 65 nm CMOS process, and the emulated capacitance of each stack is 100 fF. The energy efficiency is 0.166 pJ/b/pF with a pseudorandom binary sequence (PRBS)-7 at 5 Gb/s and 0.205 pJ/b/pF with a PRBS-31 at 3.5 Gb/s.