Properties of 2x64 linear HgCdTe MBE-grown LWIR arrays with CCD silicon readouts

Mercury-Cadmium-Telluride (MCT) 2 X 64 linear arrays with silicon readouts were designed, manufactured and tested. NCT layers were grown by MBE method on (103) GaAs substrates with CdZnTe buffer layers. 50 X 50 mm n-p-type photodiodes were formed by 80 divided by 120 keV boron implantation. The dark current at 100 mV reversed biased diodes was within 15*30 nA and zero bias resistance-area product was within R0 approximately equals 20 divided by 50 Ohm X cm2. Silicon read-out circuits were designed, manufactured and tested. Read-outs with skimming and partitioning functions were manufactured by n-channel MOS technology with buried or surface channel CCD register. The parameters of LWIR MCT linear arrays with cutoff wavelength (lambda) co 10.0 divided by 12.2 micrometers and Si readouts were tested separately before hybridization. The HgCdTe arrays and Si readouts were hybridized by cold welding In bumps technology. With skimming mode used for integration time of 24-30 ms for such MCT n-p-junctions, the detectivity D*(lambda ) approximately equals 4 X 1010 cmXHz1/2/W. Dark carrier transport mechanisms in these diodes were calculated and compared with experimental data. Two major current mechanisms were included into the current balance equations: trap-assisted tunneling and Shockley-Reed-Hall generation-recombination processes via a defect trap level in the gap. Other current mechanisms (band-to-band tunneling, bulk diffusion) were taken into account as additive contributions. Tunneling rate characteristics were calculated within k-p approximation with the constant barrier electric field. Relatively good agreement with experimental data for diodes with large zero resistance-area products (R0A > 10 OhmXcm2) was obtained.© (2001) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.