“Gated-diode” configuration in SOI MOSFET’s: A sensitive tool for evaluating the quality and reliability of the buried Si/SiO2 interface

A “gated-diode” configuration in SOI MOSFET’s is described, which is particularly suitable and easy to use for characterizing the buried oxide interface. This new approach becomes possible by taking advantage of the front gate, which is biased to inversion (NMOSFET’s) or accumulation (BC-PMOSFET’s) during the measurement. As a result, the drain merges with the inversion or accumulation layer and “extends” under the entire gate, forming a “horizontal” p-n junction with the channel. The drain-to-body diode is then forward-biased by a small voltage, and the back gate voltage is scanned such that it brings the back interface to depletion, a condition that is at the center of all gated-diode techniques and required to activate the interface states and start the recombination/generation processes. The mid-channel interface state density is obtained from the peak of the measured current vs. back gate voltage curves, and by combining the measurements with 2D numerical simulations (e.g. a combination of SUPREM and...