Auto-zeroed high speed comparator for the column level readout circuit of a CMOS active pixel sensor based detector
2008
The detection systems of future high-energy physics experiments need high resolution pixel detectors allowing auto data sparsification. One solution is the CMOS active pixel sensor based detector, which allows integration of chip-level full data processing circuits. Designed for pixel signal readout, a column-level high speed, low-power and fully offset compensated comparator is developed. For an operation frequency of 100 MHz, the resolution is better than 0.5 mV and the residual offset is only 0.15 mVrms. The power dissipation is about 220 muW. The dimension is 25 mum times 300 mum.
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