Design Optimization of Through-Silicon Vias for Substrate-Integrated Waveguides embedded in High-Resistive Silicon Interposer

In this work, the optimization of TSVs for SIWs embedded in a high-resistive silicon interposer is demonstrated. EM simulations are performed to analyze and optimize important TSV design parameters enabling silicon interposer technologies with low-loss SIWs working at mm-wave/THz frequencies. A silicon interposer using high resistive silicon and TSVs is fabricated and SIWs are characterized working from 110-170 GHz with very low attenuation of ~0.5 dB/mm.