Hardware-Efficient Architecture of Photo Core Transform in JPEG XR for Low-Cost Applications

This paper proposes a novel two-input, two-output architecture of photo core transform (PCT) in JPEG XR. First, the lifting operations of PCT are optimized such that some operations can be reused. Then the time multiplexing technique is used by combining lifting steps to design a hardware-efficient architecture. Experimental results based on field programmable gate array (FPGA) demonstrate that our architecture has good performance in reducing hardware resources and power consumption, which could be an efficient alternative in low-cost applications.