A 200 Mb/s CMOS EPRML channel with integrated servo demodulator for magnetic hard disks

1997 
This second-generation partial-response maximum-likelihood (PRML) read channel device implements an extended partial-response class 4 (EPR4) architecture by adding an EPR4 post-processor to the PR4 channel previously described. Only a single reference resistor and power-supply decoupling are required to form a complete read, write, and servo demodulation solution. Additions to the PR4 architecture include adaptive MR head asymmetry (MRA) cancellation and thermal asperity (TA) detection and correction. The servo demodulator supports 20 MHz bursts and includes a 9 b analog to digital converter (ADC) interface.
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