Atomic persistence for SCM with a non-intrusive backend controller
2016
Non-volatile byte-addressable memory has the potential to revolutionize system architecture by providing instruction-grained direct access to vast amounts of persistent data. We describe a non-intrusive memory controller that uses backend operations for achieving lightweight failure atomicity. By moving synchronous persistent memory operations to the background, the performance overheads are minimized. Our solution avoids costly software intervention by decoupling isolation and concurrency-driven atomicity from failure atomicity and durability, and does not require changes to the front-end cache hierarchy. Two implementation alternatives — one using a hardware structure, and the other extending the memory controller with a firmware managed volatile space — are described. Our results show the performance is significantly better than traditional approaches.
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