Peripheral component interface express (PCIe) interface chip hardware verification method based on asynchronous physical layer interface

The invention discloses a peripheral component interface express (PCIe) interface chip hardware verification method based on an asynchronous physical layer interface. The implementing steps are as follows: 1), establishing a field programmable gata array (FPGA) hardware platform provided with a standard PCIe interface; 2), inserting the asynchronous physical layer interface used for matching a frequency difference between a physical layer and a PCIe soft core in a PCIe interface chip application specific integrated circuit (ASIC) code to be verified; 3), migrating the PCIe interface chip ASIC code to be verified to the FPGA hardware platform to achieve synthesization, and setting a work frequency of the Physical interface of PCIe (PIPE) according to a synthesized highest frequency of a PCIe interface chip; and 4), using a test program to perform functional tests on the PCIe soft core of the PCIe interface chip and user logic through the FPGA hardware platform. The PCIe interface chip hardware verification method based on the asynchronous physical layer interface can achieve the underclocking hardware verification of the PCIe interface chip, and has the advantages of being capable of being compatible with an existing test code, easy and convenient to achieve, good in generality, and low in resource occupancy rate.