A 64-bit adder by pass transistor BiCMOS circuit

The authors describe a 64-b carry look ahead (CLA) adder using a novel pass transistor BiCMOS circuit. In this BiCMOS circuit, the outputs of pass transistors are connected directly to the bases of output bipolar transistors. The circuit has a reduced intrinsic delay time, and it shows a speed advantage over CMOS circuits at any load capacitance. A 64-b CLA adder was fabricated using a 0.5-/spl mu/m BiCMOS process. The BiCMOS circuits are used in full adders, carry path circuits, and carry select circuits in the adder. A critical path delay time of 3.5 ns was obtained at a supply voltage of 3.3 V. This represents a 25% improvement over the adder based on CMOS technology.