A 37.6mm 2 1024-channel high-compliance-voltage SoC for epiretinal prostheses

Retinal implants elicit light perception for people blinded by photoreceptor loss. Commercialized 60-channel retinal prostheses allow patients to perform simple tasks, but several hundreds to a thousand electrodes are required for face recognition/reading [1,2], posing great challenges for the design of next-generation retinal stimulators. Aside from the higher power/data demand, the electrode impedance is also increased. Placing 1000 epiretinal electrodes in the 5mm-diameter macula region reduces the electrode size to less than 0.01mm 2 , leading to a 30kΩ electrode-tissue impedance [2]. To elicit light perception of various brightness levels, the stimulators for epiretinal prostheses require an output compliance voltage of ±10V [3], thus requiring area-consuming high-voltage (HV) transistors. The stimulator in [4] achieves 1600 channels, but it is designed for subretinal rather than epiretinal prostheses. It has ±2V compliance and needs a separate chip for power telemetry. For epiretinal prostheses, an HV-compliant 1024-channel stimulator in [3] is estimated to occupy 64mm 2 and requires off-chip diodes for power rectification. For a space-restricted retinal implant, a small-sized fully integrated SoC with minimal number of off-chip components is preferred.