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1-Tbyte/s 1-Gbit 3-D DRAM Architecture for High Throughput Computing
1-Tbyte/s 1-Gbit 3-D DRAM Architecture for High Throughput Computing
2010
Yanagawa Yoshimitsu
Ôno Kazuo
Kotabe Akira
Sekiguchi Tomonori
Keywords:
Computer architecture
Through-silicon via
Parallel computing
Gigabit
High-throughput computing
Architecture
Computer science
Dram
Correction
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