The method for integrating FBAR with circuitry on CMOS chip

2004 
A method is described to integrate a 3/spl times/2 ladder type film bulk acoustic wave (FBAR) filter on a CMOS chip. The modified Mason equivalent circuit model is used to simulate the FBAR characteristics. The filter is designed by the insertion loss method to meet the requirements. A low noise amplifier (LNA) has been designed and manufactured by the UMC 0.18 /spl mu/m process. By the use of a post CMOS process, the FBAR filter structure can be realized on a CMOS chip. Finally, the mass loading frequency trimming method can adjust the center frequency of the FBAR. The feasibility of integration can be proved by this method.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    6
    References
    18
    Citations
    NaN
    KQI
    []