On the origin of the leakage current in p-gate AlGaN/GaN HEMTs

Temperature dependent DC and double pulse measurements are performed on p-GaN gated AlGaN/GaN enhancement mode power transistors. Devices with improved Schottky metal/p-GaN interface quality and p-GaN sidewall passivation are studied. It is shown that both processes reduce the reverse and forward gate leakage current significantly. This is related to the improved p-GaN sidewall roughness and density of interface states, all contributing to sidewall leakage. Under double pulsed testing, an untreated device shows a negative threshold voltage shift at high forward gate voltage, which is explained by hole trapping in the barrier. Improving the p-GaN sidewall quality reduces the supply of holes towards the p-GaN/AlGaN interface, and a positive threshold voltage shift is observed. This can be explained by electron injection from the channel into the barrier.