Engineering of tunnel barrier for highly integrated nonvolatile memory applications

In this paper, the engineered tunnel barrier technology is introduced by using the engineered tunnel barrier of VARIOT type (SiO2/Si3N4/SiO2) and CRESTED type (Si3N4/SiO2/Si3N4) with Si3N4 and high-k HfO2 layers as charge trapping layers, respectively. In addition, the high-k stacked VARIOT type of SiO2/HfO2/Al2O3 and Al2O3/HfO2/Al2O3 are compared with O/N/O tunnel barrier memory. As a result, the engineered tunnel barrier memory device showed excellent memory characteristics compared to the single SiO2 tunnel barrier memory device, such as very high P/E (program/erase) speed, good retention time and no degradation in endurance characteristics.