Elevated Base Single - Poly Self - Aligned BJTs for Deep Submicron BiCMOS

1996 
This paper reports the fabrication of single-polysilicon self-aligned transistors using a 200mm 0.35?m CMOS-derived bipolar process. An improved Ti salicidation process has been developed to minimize narrow emitter effects. Good device characteristics are demonstrated for 0.35?m wide emitter devices, showing that this transistor structure can be extended to sub-0.5?m BiCMOS.
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