InGaAs-InP core–shell nanowire/Si junction for vertical tunnel field-effect transistor

Tunnel field-effect transistors (TFETs) have attracted much attention as building blocks for low-power integrated circuits because they can lower the subthreshold slope (SS) below the physical limitation of conventional FETs. There, however, remains a difficulty in increasing the tunnel current in TFETs since the energy gap at the tunnel junction has a unique probability. Here, we investigated the strain effect stemming from the InGaAs-InP core–shell (CS) structure on the tunneling current in a vertical TFET using an InGaAs nanowire (NW)/Si heterojunction. We found that the TFET demonstrated a 10-fold enhancement in current while achieving a steep SS (minimum SS = 41 mV/dec). Strain analysis for the InGaAs NW/Si tunnel junction revealed that specific strain induced at the junction affected the increase in the on-state current.