III-V clan nano wire planar transistor based on SOI substrate and preparation method thereof

An III-V clan nano wire planar transistor based on a SOI substrate and a preparation method thereof; the transistor comprises the following elements: the SOI substrate; a source zone and a drain zone formed on the SOI substrate; a plurality of III-V clan nano wires connected with the source zone and the drain zone; a SiO2 buffer layer formed on surfaces of the source zone and the drain zone; an insulation medium layer formed on surfaces of the III-V clan nano wires and the SiO2 buffer layer, and completely wrapping the III-V clan nano wires; a source electrode formed on the top of the soruce zone; a drain electrode formed on the top of the drain zone; a grid electrode formed on the plurality of III-V clan nano wires between the source zone and the drain zone, and wrapping the plurality of III-V clan nano wires. The preparation of plane nano wire transistors can be realized.